# translation of pt_BR.po to Brazilian Portuguese # Copyright (C) 2005 THE PACKAGE'S COPYRIGHT HOLDER # This file is distributed under the same license as the KERNEL package. # Arnaldo Carvalho de Melo , 2005. # Roberto Alcantara Filho , 2005. # msgid "" msgstr "" "Project-Id-Version: pt_BR\n" "Report-Msgid-Bugs-To: \n" "POT-Creation-Date: 2005-06-26 00:06+0100\n" "PO-Revision-Date: 2005-03-06 16:32-0400\n" "Last-Translator: Roberto Alcantara Filho \n" "Language-Team: Brazilian Portuguese \n" "MIME-Version: 1.0\n" "Content-Type: text/plain; charset=UTF-8\n" "Content-Transfer-Encoding: 8bit\n" "X-Generator: KBabel 1.3.1\n" "Plural-Forms: nplurals=2; plural=(n > 1);\n" #: arch/arm/mach-ixp4xx/Kconfig:7 msgid "Intel IXP4xx Implementation Options" msgstr "" #: arch/arm/mach-ixp4xx/Kconfig:9 msgid "IXP4xx Platforms" msgstr "" #: arch/arm/mach-ixp4xx/Kconfig:12 msgid "Avila" msgstr "" #: arch/arm/mach-ixp4xx/Kconfig:13 msgid "" "Say 'Y' here if you want your kernel to support the Gateworks\n" "Avila Network Platform. For more information on this platform,\n" "see .\n" msgstr "" #: arch/arm/mach-ixp4xx/Kconfig:19 msgid "Coyote" msgstr "" #: arch/arm/mach-ixp4xx/Kconfig:20 msgid "" "Say 'Y' here if you want your kernel to support the ADI\n" "Engineering Coyote Gateway Reference Platform. For more\n" "information on this platform, see .\n" msgstr "" #: arch/arm/mach-ixp4xx/Kconfig:26 msgid "IXDP425" msgstr "" #: arch/arm/mach-ixp4xx/Kconfig:27 msgid "" "Say 'Y' here if you want your kernel to support Intel's\n" "IXDP425 Development Platform (Also known as Richfield).\n" "For more information on this platform, see .\n" msgstr "" #: arch/arm/mach-ixp4xx/Kconfig:33 msgid "IXDPG425" msgstr "" #: arch/arm/mach-ixp4xx/Kconfig:34 msgid "" "Say 'Y' here if you want your kernel to support Intel's\n" "IXDPG425 Development Platform (Also known as Montajade).\n" "For more information on this platform, see .\n" msgstr "" #: arch/arm/mach-ixp4xx/Kconfig:40 msgid "IXDP465" msgstr "" #: arch/arm/mach-ixp4xx/Kconfig:41 msgid "" "Say 'Y' here if you want your kernel to support Intel's\n" "IXDP465 Development Platform (Also known as BMP).\n" "For more information on this platform, see .\n" "\n" msgstr "" #: arch/arm/mach-ixp4xx/Kconfig:58 msgid "PrPMC1100" msgstr "" #: arch/arm/mach-ixp4xx/Kconfig:59 msgid "" "Say 'Y' here if you want your kernel to support the Motorola\n" "PrPCM1100 Processor Mezanine Module. For more information on\n" "this platform, see .\n" msgstr "" #: arch/arm/mach-ixp4xx/Kconfig:81 msgid "Gemtek WX5715 (Linksys WRV54G)" msgstr "" #: arch/arm/mach-ixp4xx/Kconfig:83 msgid "" "This board is currently inside the Linksys WRV54G Gateways.\n" "\n" "IXP425 - 266mhz\n" "32mb SDRAM\n" "8mb Flash\n" "miniPCI slot 0 does not have a card connector soldered to the board\n" "miniPCI slot 1 has an ISL3880 802.11g card (Prism54)\n" "npe0 is connected to a Kendin KS8995M Switch (4 ports)\n" "npe1 is the \"wan\" port\n" "\"Console\" UART is available on J11 as console\n" "\"High Speed\" UART is n/c (as far as I can tell)\n" "20 Pin ARM/Xscale JTAG interface on J2\n" "\n" msgstr "" #: arch/arm/mach-ixp4xx/Kconfig:98 #, fuzzy msgid "IXP4xx Options" msgstr "Opções de Segurança" #: arch/arm/mach-ixp4xx/Kconfig:101 msgid "Use indirect PCI memory access" msgstr "" #: arch/arm/mach-ixp4xx/Kconfig:102 msgid "" "IXP4xx provides two methods of accessing PCI memory space:\n" "\n" "1) A direct mapped window from 0x48000000 to 0x4bffffff (64MB).\n" " To access PCI via this space, we simply ioremap() the BAR\n" " into the kernel and we can use the standard read[bwl]/write[bwl]\n" " macros. This is the preferred method due to speed but it\n" " limits the system to just 64MB of PCI memory. This can be\n" " problamatic if using video cards and other memory-heavy devices.\n" "\n" "2) If > 64MB of memory space is required, the IXP4xx can be\n" " configured to use indirect registers to access PCI This allows\n" " for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus.\n" " The disadvantadge of this is that every PCI access requires\n" " three local register accesses plus a spinlock, but in some\n" " cases the performance hit is acceptable. In addition, you cannot\n" " mmap() PCI devices in this case due to the indirect nature\n" " of the PCI window.\n" "\n" "By default, the direct method is used. Choose this option if you\n" "need to use the indirect method instead. If you don't know\n" "what you need, leave this option unselected.\n" msgstr ""